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Similar provisos apply to image handling methods: while most of the image handling APIs provide methods for querying the values of single pixels, it is very inef cient indeed to perform single pixel operations on a large number of pixels. There is a signi cant overhead in every method invocation and an even bigger overhead in every IPC. It is important to make every one count. File input and output is the same. These classes provide block methods for a reason: making a leserver request takes a signi cant amount of time over and above the time required to actually ful ll the request. Use the block read and write methods if you need to read or write more than one character. In some cases, this can be literally thousands of times faster. Memory allocation can also be slow, so you may wish to avoid repeatedly invoking memory allocation functions. I describe some approaches to improving the performance of memory allocation later in Section 18.2.9.

Different ARM processors, even at the same clock frequencies, have different performance characteristics. With ARMv6 processors now becoming available, these differences have become very signi cant. If you re an application developer, you will want your code to work well on all ARMcompatible processors to maximize your audience. To achieve this, it s important to understand some of the differences between ARM platforms. Symbian OS has historically supported three-and-a-half ARM architectures. I ll ignore the ARMv3 and ARMv4 architectures because they are no longer supported by Symbian OS, and turn instead to the two that are actively supported today. ARMv5: Most mobile application processors in production at the time of writing are ARMv5 processors. Typical ARMv5 processor cores include the ARM926EJ at the heart of the Texas Instruments OMAP1610 and 1710 chips and many manufacturer-speci c ASICs. ARMv5 retained substantial compatibility with ARMv4, needing only fairly minor changes to operating systems and almost no changes to application code. Most ARMv5 processors run at frequencies between 100 and 200 MHz, though XScale is currently available at speeds up to 700 MHz. ARMv5 processors usually reach speeds of 180MIPS, while some high performance variants occasionally exceed 250MIPS. XScale can reach speeds of 500MIPS, though it is usually restrained to a more sedate pace by mobile memory systems. ARMv6: This new architecture promises to improve performance with a number of new features, including dynamic branch prediction similar to that introduced in XScale, a new and very much improved physically-tagged cache architecture, support for symmetric multiprocessing, branch folding and other substantial improvements.

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ARMv6 is much more than an incremental improvement over ARMv5. ARM1136JF-S, as used in the Texas Instruments OMAP2420, Freescale MXC and other mobile ASICs, was the rst ARMv6 processor to become available. Because of ARMv6 s Prefetch Unit and branch folding capabilities, ARMv6 processors may execute more than one instruction per clock cycle. ARMv6 processors are very fast and routinely exceed 400MIPS. Some ARM1136JF-S based ASICs are expected to reach clock frequencies of nearly 700 MHz. These processors will return gures of around 750MIPS. As they also have a vector oating point unit and SIMD instruction set, the performance available from these processors is considerably in excess of that available on the more common and cheaper ARMv5 solutions.

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